Conventionally known polishing cloths for final polishing of a semiconductor wafer are a polishing cloth having a two-layered structure including a suede-like soft polishing layer and a supporting layer of a nonwoven fabric impregnated with polyurethane, and a polishing cloth having a three-layered structure in which a non-foamed PET sheet layer is sandwiched between the two-layered structure. For example, Patent Document 1 discloses a final polishing pad to be used for forming a satisfactory mirror surface on a silicon bare wafer, a glass, a compound semiconductor substrate, a hard disk substrate, or the like, and the polishing pad is intended to provide stable polishing characteristics such that fewer defects such as a scratch and a particle are generated after polishing on a surface to be mirror-polished and the mirror-polished surface has smaller surface roughness, and thus to be suitable for finishing. In particular, the patent document discloses a polishing pad in FIG. 1 and the specification, in which a porous polyurethane layer (c), a plastic film (e), and a foamed plastic layer (d) are laminated in this order from the top to form a polishing sheet (a), and a cushion sheet (b) consisting of a foamed plastic is further laminated in the bottom side of the polishing sheet with a plastic sheet (f) sandwiched therebetween, and a back tape (g) is pasted on the bottom of the cushion sheet (b). The patent document further discloses that the plastic film (e) preferably has a thickness of 10 to 45 μm and an average tensile elastic modulus of 3.5 GPa or higher and 5.5 GPa or lower.